This invention relates, in general, to a method for fabricating semiconductor devices and more particularly to a method of fabricating multiple trench semiconductor structures.
Multiple trench semiconductor structures have commonly included both trench and shallow isolation elements being photolithographically defined. In order to do this, at least two separate mask steps must be employed. Although these photolithographic techniques and methods have been reasonably successful, the scalability of the structure is severely limited partially because of the misregistration budget that must be allowed for.
U.S. Pat. No. 4,209,349, entitled "Method for Forming a Narrow Dimensioned Mask Opening On a Silicon Body Utilizing Reactive Ion Etching" issued to Ho et al. on June 24, 1980, discloses the formation of a narrow mask opening on a silicon body. A second insulator layer is applied on both the horizontal and vertical surfaces of a silicon body and is then reactive ion etched to remove the horizontal layer and provide narrow dimensioned spacers on the silicon body. The surface of the silicon body is then thermally oxidized and the spacers are removed to form a narrow dimensioned mask opening. The narrow dimension mask opening is then employed for implant masking.